Computing Professor Develops Algorithms to Design Faster Computer Circuits
Research conducted by Ioannis Koutis, associate professor of computer science at NJIT, may change how manufacturers think about logic circuit design and increasing circuit processing speeds compared to state-of-the-art methods.
When a manufacturer designs a logic circuit, it is necessary, particularly as circuits become larger, to partition the circuit into smaller pieces to accommodate space constraints on the physical circuit. Using graph partitioning algorithms, manufacturers divide a circuit into two or more roughly equal-sized parts. A critical consideration during this process is how to minimize the number of connections between the parts to prevent bandwidth issues and maximize speed.
This “balanced partitioning” approach employs a highly localized process that considers what elements should be placed on either side of a partition, creating a series of small contractions in size.
Koutis, through his research, has gone a different route, looking at how a circuit and its parts function not only at the local level but across the entire circuit, helping him gain a global understanding of the complete circuit space. Working with field-programmable gate array (FPGA) circuits - integrated circuits that are designed to be configured after manufacturing - he has applied new algorithms that can be applied holistically across the entire circuit.
Koutis has found that these new algorithms that work globally across the circuit can result in circuits with processing speeds 3-4 times faster than the circuits produced by the localized approach that currently dominates circuit production. On even larger circuits, the increase in speed can be as significant as 4-5 times faster.
“Previously, we have been limited on our ability to perform very complex computations because of the limitations inherent in how we have designed circuits,” said Koutis. “I am hopeful that algorithms one can apply holistically across a circuit will replace current design methods, leading to faster, more accurate circuits.”
Koutis was helped in his research by Bodhisatta Pramanik, a Ph.D. student from Iowa State University. He also received support from Ismail Bustany, distinguished engineer, and Grigor Gasparyan, engineering fellow, at Xilinx, Inc. They will share their research at the Society for Industrial and Applied Mathematics (SIAM) Annual Meeting, being held virtually on July 19-23.